Prof. Baris Kasikci recognized as rising star by Intel

Prof. Baris Kasikci has been selected as a recipient of Intel’s Rising Star Award, which recognizes early career faculty who show great promise in developing future computing technologies. The program also fosters long-term collaborative relationships with senior technical leaders at Intel.

Kasikci’s work is at the intersection of software systems, computer architecture, and programming languages, with a strong focus on improving system reliability, security, and performance. He joined the faculty at Michigan in September 2017 after completing his PhD in 2015 at École Polytechnique Fédérale de Lausanne and working as a researcher at Microsoft Research. Throughout his career, he has collaborated significantly  with Intel on a variety of projects.

In an area of inquiry begun in 2014 that continues to this day, Kasikci has worked to develop a number of bug detection and diagnosis tools – an important area, since understanding and reasoning about bugs can take as much as 50% of the time of developers. Using Intel Processor Trace, a capability embedded in Intel processors, Kasikci has made non-invasive observations of program executions for diagnosis. This has led to the development of tools for identifying the source and nature of failures for the purpose of improving software reliability. One example is a technique called REPT, which  partially reconstructs a failed execution so that developers can then use the reconstructed execution for debugging. His paper on REPT received a best paper award at OSDI ‘18.

In another research thrust, Kasikci is developing systems software support for emerging heterogeneous architectures such as those that incorporate field programmable gate arrays (FPGAs). These architectures deconstruct traditional computer CPUs into a set of specialized computing units that together provide a higher level of performance. Cloud providers are now seeking to share FPGAs among multiple customers via virtualization, in which many users share the computing resource simultaneously. However, there has been a lack of infrastructure and programming support for these new architectures, including for direct memory access under virtualization. Kasikci’s work developed the first hypervisor that supports scalable shared-memory FPGA virtualization. 

Kasikci has also been active in designing secure architectures that are resistant to speculative execution attacks, such as Spectre and Meltdown. These attacks work by accessing secret data during speculative execution, which is later recovered by an attacker who uses a covert channel. Because early speculative execution attacks relied on cache side channels to extract secrets, most initial defenses have also focused on blocking the cache covert channel. Kasikci’s work observed that these attacks require a chain of dependent wrong-path instructions to access and transmit secret data, and he has proposed a technique to restrict speculative data propagation, which breaks the attacks’ wrong-path dependence chains, while still allowing speculation and dynamic scheduling. 

Kasikci has recently begun research into the reliability of persistent memory systems, such as Intel’s Optane DC persistent memory. Similar to traditional DRAM, persistent memory differs in that it is not volatile and is available in higher capacities. Its applications are to increase memory capacity and to store select data, such as file system data, for faster access. Because it is not volatile, memory leaks and related bugs are not easily cleared, and as a result new processes are needed to find and respond to these types of bugs before software can be ported to these systems. Kasikci proposes to build generic tools which utilize program analysis techniques that can automatically explore the state space of PM applications to find bugs without relying on developer effort and test suites.

In an additional new thrust, Kasikci will be collaborating with Intel to investigate how to speed up applications while using new hardware prefetching support. Prefetching improves performance by allowing the processor to anticipate which instructions and data will be accessed in the future and to retrieve them proactively. Under this project, the researchers will observe the execution of applications in order to profile them for more accurate prefetching performance. Profile data will be recorded to hardware to improve performance in subsequent interactions.